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Core comparison

Comparison helps you see quickly which core carries less license, review, and integration risk.

Decision matrix

How to read the matrixStart with review status, license clarity, and warnings. If records are close, then look at tests, board evidence, and toolchain fit.2/4

AccelFury core-template

M2-M3 templateMaturity levelMaturity M2-M3 template: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale.

Шаблон production-style FPGA IP: manifest, registry, board/toolchain scaffolding, SPDX checks, separated licenses and release checklist.

githubManually reviewedCERN-OHL-S-2.0 + AGPL + CC-BY-SA
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Info

This is a template/example, not a standalone core.

Info

Generated projects require separate review.

Ibex

M7 candidateMaturity levelMaturity M7 candidate: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale.

Small open RISC-V CPU used by OpenTitan.

githubAuto indexedApache-2.0
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Warning

Manual review is required.

SignalAccelFury core-templateIbex
Category / sourcegenerator / template / IP methodology
github		processor/RISC-V
github
Review / maturity
Manually reviewedM2-M3 templateMaturity levelMaturity M2-M3 template: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale.
Auto indexedM7 candidateMaturity levelMaturity M7 candidate: evidence-gated readiness label. No source cannot exceed M0; no synthesis evidence cannot reach M4; no board evidence cannot reach M5. Open the KB guide for the full scale.
License
CERN-OHL-S-2.0 + AGPL + CC-BY-SAunknown_or_manual_review_required
Apache-2.0allowed_by_current_metadata
Evidence / boards
EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees.
EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees.
Board status
unknown
unknown
Tests / CI / formal
TestsCurrent metadata does not show reproducible test evidence yet.CICurrent metadata does not show confirmed CI yet.FormalFormal evidence has not been found yet.
TestsCurrent metadata does not show reproducible test evidence yet.CICurrent metadata does not show confirmed CI yet.FormalFormal evidence has not been found yet.
Docs / FuseSoC / board demo
DocsDocumentation is visible in current metadata.FuseSoCFuseSoC packaging has not been found yet.Board demoBoard-level demo or target evidence is not confirmed yet.
DocsDocumentation is not evidence-confirmed yet.FuseSoCFuseSoC packaging has not been found yet.Board demoBoard-level demo or target evidence is not confirmed yet.
Signals
QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification
QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification
Interfaces / buses
unknownunknown
unknownunknown
ToolchainsVerilatorVerilator
Warnings
  • This is a template/example, not a standalone core.
  • Generated projects require separate review.
  • Manual review is required.