Compare cores

Up to four cores side by side: maturity, license, tests and activity.

AttributeIbexVexiiRiscvNEORV32
MaturityM2 · Simulation-testedM2 · Simulation-testedM4 · Production-ready
LicenseApache-2.0 · Commercial-friendlyMIT · Commercial-friendlyBSD-3-Clause · Commercial-friendly
LanguageSystemVerilogSpinalHDL (Scala)VHDL
Testsyesyesyes
CIyesyesyes
Formalyes——
FuseSoCyes——
Activityupdated 7 days agoupdated 4 days agoupdated 5 days ago
Boards———
Interfaces—AXI4, Wishbone, Tilelink, AXI4, Wishbone, Tilelink—
CategoryCPUs and computeCPUs and computeCPUs and compute

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