verilog-axi
unknownAXI component library and comparison source.
githubUnreviewedunknown
The license requires manual review.
Comparison helps you see quickly which core carries less license, review, and integration risk.
AXI component library and comparison source.
The license requires manual review.
Small open RISC-V CPU used by OpenTitan.
Manual review is required.
| Signal | verilog-axi | Ibex |
|---|---|---|
| Category / source | bus/AXI github | processor/RISC-V github |
| Review / maturity | Unreviewed unknown | Auto indexed M7 candidate |
| License | unknownUnknown | Apache-2.0Manual review required |
| Evidence / boards | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. | EvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records, not portability guarantees. |
| Board status | unknown | unknown |
| Tests / CI / formal | Tests: NoCI: NoFormal: No | Tests: NoCI: NoFormal: No |
| Docs / FuseSoC / board demo | Docs: NoFuseSoC: NoBoard demo: No | Docs: NoFuseSoC: NoBoard demo: No |
| Signals | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification | QualityQualityUsefulnessUsefulnessIntegrationIntegrationVerificationVerification |
| Interfaces / buses | unknownAXI | unknownunknown |
| Toolchains | Verilator | Verilator |
| Warnings |
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