Requires independent simulation, synthesis, timing, board and license review before production use.
Efinix Sapphire RV64 SoC
Configurable soft RISC-V SoC from Efinix: 1 to 4 64-bit cores, optional SV39 MMU, L1 and L2 caches, DDR3, LPDDR4x and HyperRAM controller for Efinix FPGAs; licence not stated.
CPUs and computeNo license foundM1 · Prototype
Worth knowing
Facts
The source is not on GitHub — an editor checks tests and license manually.
- Maturity
- M1 · Prototype
- License
- No license found
- Tests
- not found
- CI
- not found
- Formal verification
- not found
- FuseSoC
- not found
Source exists, but no tests were found. How maturity is assigned
Purpose
Configurable 64-bit RISC-V core for Efinix Trion, Titanium and Topaz FPGAs.
Boards
No one has confirmed a board run yet.
Add evidenceSources
- The Sapphire RV64 SoC is described as a configurable and cached soft RISC-V SoC that optionally includes a DDR DRAM cont… · 2026-10-02
- The core is similar to the open-source VexiiRiscv but optimized for Trion and Titanium FPGAs (Efinix wording). · 2026-10-02
- One to four 64-bit RISC-V processors, each with instruction and data cache up to 8 ways, optional 64 KB to 512 KB L2 cac… · 2026-10-02
- The operating frequency is configurable from 20 to 400 MHz; the fMAX of the design limits the actual performance. · 2026-10-02
- Optional micro-architecture features include an FPU, a dynamic branch predictor, software and hardware prefetchers, cust… · 2026-10-02
- Peripherals include a CLINT timer, a platform-level interrupt controller, a watchdog, up to 5 I2C, up to 3 UART, up to 3… · 2026-10-02
- The memory controller supports DDR3, LPDDR4x or HyperRAM modules from 4 MB to 8 GB over one half-duplex AXI3 or one full… · 2026-10-02
- Debug follows the standard RISC-V debug specification with up to 4 hardware breakpoints and up to 4 performance counters… · 2026-10-02
- The SoC is configured in the Efinity IP Manager; the support page lists the Efinity RISC-V Embedded Software IDE, a data… · 2026-10-02
- The support page lists all Trion FPGAs except the T4 and all Titanium FPGAs; some features, such as the DDR controller,… · 2026-10-02
- The press release dated 28 September 2026 states availability for all Titanium FPGAs, all Topaz FPGAs and all Trion devi… · 2026-10-02
- The RV64 core implements RISC-V64IM with a seven-stage pipeline and optional A, F, D, C, Zba, Zbb, Zbs and Zicbom extens… · 2026-10-02
- The page states no licence terms for the core. · 2026-10-02
How to check it locally
- Try a synthesis smoke run with: Efinity IDE, Efinity IP Manager, Efinity RISC-V Embedded Software IDE.
Scores and how they are computed
License, tests, CI, formal checks, documentation and activity come from the repository check. Usefulness and learning value are editorial estimates.
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