Cores124
P0 launch52
Needs review122
Open flow4
Board linked2

High-risk records in the current index

Submit evidence
P0confidence 2/5

OpenTitan IP blocks

High-quality IP block library with docs and verification culture.

Warning

Manual review is required.

P0confidence 2/5

Ibex

Small open RISC-V CPU used by OpenTitan.

Warning

Manual review is required.

P0confidence 2/5

LiteX

Central open SoC builder and integration framework.

Warning

Manual review is required.

P0confidence 2/5

OpenCores Wishbone

Bus protocol reference for OpenCores-era reusable IP.

Warning

Manual review is required.

P0confidence 2/5

OpenCores WBScope

Useful Wishbone-accessible debug core by ZipCPU author.

Warning

Manual review is required.

Catalog

What is surfacedThe index already surfaces warnings, evidence counts, board links, and review depth. That is enough for triage, but not for a final verdict.2 records
CoreLicense / reviewSignalsInterfaces / flowWarnings
LitePCIeperipheral/PCIe
P0Auto indexedgithub

Open PCIe ecosystem core.

unknownNo clear licenseM1-M3 candidate
Q / Int / VerQuality / Integration / VerificationEvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records.ConfidenceReview/evidence confidence on a five-point scale.
Migen/Python/VerilogPCIeunknownLiteX, Verilator
The license requires manual review.There is a vendor tooling or license constraint.
verilog-pcieperipheral/PCIe
P1Unreviewedgithub

PCIe endpoint/DMA candidate.

unknownNo clear licenseunknown
Q / Int / VerQuality / Integration / VerificationEvidencePublic evidence links attached to this record.BoardsBoard-linked compatibility records.ConfidenceReview/evidence confidence on a five-point scale.
unknownPCIeunknownVerilator
The license requires manual review.There is a vendor tooling or license constraint.