OpenTitan IP blocks
High-quality IP block library with docs and verification culture.
Manual review is required.
An evidence-first catalog for fast engineering triage: reusable value, license risk, verification depth, and board fit before you open the upstream repo.
High-quality IP block library with docs and verification culture.
Manual review is required.
Small open RISC-V CPU used by OpenTitan.
Manual review is required.
Central open SoC builder and integration framework.
Manual review is required.
Bus protocol reference for OpenCores-era reusable IP.
Manual review is required.
Useful Wishbone-accessible debug core by ZipCPU author.
Manual review is required.
processor/soft CPU
The license requires manual review.
CPU, Wishbone and formal-heavy ecosystem.
bus bridge/formal
The license requires manual review.
Wishbone/AXI bridge and formal property library.
verification/Wishbone BFM
The license requires manual review.
Verification helper for Wishbone cores.
bus/Wishbone interconnect
The license requires manual review.
Common Wishbone interconnect package.
memory/Wishbone RAM
The license requires manual review.
Minimal SoC building block.
processor/OpenRISC
The license requires manual review.
The source appears stale or legacy.
OpenRISC core relevant to Wishbone history.