Universal FPGA programming utility for Xilinx, Altera/Intel, Lattice, Gowin, Efinix, Anlogic, and Cologne Chip.
Projects
Open-source FPGA projects
RTL, tooling, boards, labs.
Extensible waveform viewer for VCD/FST/GHW debug, available as native and web apps.
Suite of SystemVerilog developer tools: parser, formatter, linter, and syntax tooling.
Python-based FPGA SoC builder for cores, buses, soft CPUs, and board targets.
Open-source SystemVerilog simulator and lint system.
Portable FPGA place-and-route tool with support for several FPGA families.
Open SYnthesis Suite for Verilog RTL synthesis and formal-related flows.