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FPGA Challenges: CDC

Verifiable challenges in the CDC track. Execution is local; fpga.camp validates only report.json.

D3CDCCC-BY-4.0OriginalLocal checkerPublished

Two-flop CDC synchronizer

A CDC task: implement a safe 2FF synchronizer, check reset assumptions, and record proof limitations.

Time
50-110 min
Pass score
80/100
HDL
SystemVerilog
Audience
Junior engineer, Engineer, Maintainer
Package
Download available
Next step
Run locally, upload report.json
verilatorsymbiyosys
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