UART TX/RX
D4junior
Build a staged UART TX/RX learning project with simulation and debug checkpoints.
edu.fpga.camp
Project-Based Learning Tracks
Project tracks are curated staged exercises, not arbitrary large project execution.
SPI master
D4junior
Build a staged SPI master learning project with simulation and debug checkpoints.
PWM
D3embeddedstudent
Build a staged PWM learning project with simulation and debug checkpoints.
VGA/simple video timing
D4studentjunior
Build a staged VGA/simple video timing learning project with simulation and debug checkpoints.
Audio/PDM or simple FIR
D5middle
Build a staged Audio/PDM or simple FIR learning project with simulation and debug checkpoints.
Simple CPU / tiny softcore
D5middle
Build a staged Simple CPU / tiny softcore learning project with simulation and debug checkpoints.
RISC-V softcore intro
D5middle
Build a staged RISC-V softcore intro learning project with simulation and debug checkpoints.
Simple SoC intro
D5middle
Build a staged Simple SoC intro learning project with simulation and debug checkpoints.