D2SimulationCC-BY-4.0OriginalLocal checkerPublished
FIFO and simulation scoreboard
A local FIFO simulation task: verify data order, full/empty behavior, and no reads from an empty queue.
- Time
- 45-90 min
- Pass score
- 75/100
- HDL
- SystemVerilog
- Audience
- Student, Junior engineer, Engineer
- Package
- Download available
- Next step
- Run locally, upload report.json
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