Amaranth HDL
Checked on GitHubModern Python-based HDL ecosystem source.
Generators and frameworksBSD-2-ClauseM4 · Production-readyupdated 13 days ago
Cores
Open HDL cores for FPGA. License, tests and activity checked on GitHub.
AccelFury core-template
Checked on GitHubFPGA IP template with a manifest, board and toolchain configuration, SPDX checks, separate licenses and a release checklist.
Generators and frameworksRust/SystemVerilog/TypeScriptCERN-OHL-S-2.0 + AGPL + CC-BY-SAM2 · Simulation-testedupdated 5 months ago
LiteX
Checked on GitHubCentral open SoC builder and integration framework.
Generators and frameworksMigen/Python/VerilogCustom licenseM4 · Production-readyupdated 8 days ago