Project F display controller
Checked on GitHubClear video/display learning resource.
Audio and videoMITM2 · Simulation-testedupdated 8 months ago
Open HDL cores for FPGA. License, tests and activity checked on GitHub.
Clear video/display learning resource.
Audio and videoMITM2 · Simulation-testedupdated 8 months ago
FM sound core useful for retro/audio category.
Audio and videoVerilogGPL-3.0M2 · Simulation-testedupdated 31 days ago
YM2151 clone candidate.
Audio and videoGPL-3.0M2 · Simulation-testedupdated 2 months ago
OPL-compatible sound core candidate.
Audio and videoGPL-3.0M2 · Simulation-testedupdated 2 months ago
Verilog-2001 PDM receiver for MEMS microphones. Generates the PDM clock and outputs a one-bit valid/ready stream. Does not convert PDM to PCM.
Audio and videoVerilog-2001Custom licenseM1 · Prototype
Open HDMI/DVI transmitter candidate.
Audio and videoVerilog/VHDLNo license foundM4 · Production-readyupdated 3 months ago
VGA timing core candidate.
Audio and videoNo license foundM1 · Prototype
Image processing category seed.
Audio and videoVerilog/VHDL unknown until reviewNo license foundM1 · Prototype
Video category seed.
Audio and videoVerilog/VHDL unknown until reviewNo license foundM1 · Prototype